//==========================================================================
// Copyright (c) 2000-2008,  Elastos, Inc.  All Rights Reserved.
//==========================================================================
/*********************************************************************
Copyright:      (c) Intel Corporation, 2002, 2003, 2004
 
INTEL MAKES NO WARRANTY OF ANY KIND REGARDING THE CODE.  THIS CODE IS
LICENSED ON AN "AS IS" BASIS AND INTEL WILL NOT PROVIDE ANY SUPPORT,
ASSISTANCE, INSTALLATION, TRAINING OR OTHER SERVICES.  INTEL DOES NOT
PROVIDE ANY UPDATES ENHANCEMENTS OR EXTENSIONS.  INTEL SPECIFICALLY
DISCLAIMS ANY WARRANTY OF MERCHANTABILITY, NONINFRINGEMENT, FITNESS
FOR ANY PARTICULAR PURPOSE, OR ANY OTHER WARRANTY.  INTEL DISCLAIMS
ALL LIABILITY, INCLUDING LIABILITY FOR INFRINGMENT OF ANY PROPRIETARY
RIGHTS, RELATING TO USE OF THE CODE.  NO LICENSE, EXPRESS OR IMPLIED,
BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS
GRANTED HEREIN.
*********************************************************************/

#include <stdio.h>
#include <string.h>
#include "Platform.h"


#define WRITE_REGION_SIZE    (1024 * 30)     // 30 KBytes - should be cacheable


extern void CommWriteLn(char *c);
extern int coldstart(void);
extern void assm_call(void);
extern int *MMUTableWT;         // write-through SDRAM
extern int *MMUTableWB;         // write-back SDRAM
extern void setup(void);
extern void main_s(int);
extern char pstring[100];
extern void VerbosePrintlnToComm(char *c);

extern unsigned int *Image$$RO$$Base;
extern unsigned int *Image$$RO$$Limit;
extern unsigned int *Image$$RW$$Base ;
extern unsigned int  *Image$$RW$$Limit;
extern unsigned int  *Image$$ZI$$Base ;
extern unsigned int  *Image$$ZI$$Limit;



void coldstart_icache_btb_on__asm(void);
void coldstart_grant_domain_access__asm(void);
void coldstart_enable_dcache__asm(void);
void coldstart_icache_btb_on__asm(void);
void coldstart_write_mmubase__asm(void*);


